{"datasheetId":"ds_0f73eabcae531d8c17f1","nextCursor":"49","chunks":[{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0001","chunkIndex":0,"heading":"MPU-6000 and MPU-6050 Register Map and Descriptions Revision 4.2","headingPath":["MPU-6000 and MPU-6050 Register Map and Descriptions Revision 4.2"],"preview":"MPU 6000 and MPU 6050 Register Map and Descriptions Revision 4.2 CONTENTS 1 REVISION HISTORY .......... 2 PURPOSE AND SCOPE .... 3 REGISTER MAP.. .6 4 REGISTER DESCRIPTIONS... .9 4.1 REGISTERS 13 TO 16 – SELF TEST REGISTERS.. ...9 4.2 REGIS","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0001"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0002","chunkIndex":1,"heading":"CONTENTS","headingPath":["CONTENTS"],"preview":"4.19 REGISTERS 67 TO 72 – GYROSCOPE MEASUREMENTS ... ...31 4.20 REGISTERS 73 TO 96 – EXTERNAL SENSOR DATA...... ..32 4.21 REGISTER 99 – I2C SLAVE 0 DATA OUT.. .34 4.22 REGISTER 100 – I2C SLAVE 1 DATA OUT.. ..34 4.23 REGISTER 101 – I2C SLAVE","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0002"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0003","chunkIndex":2,"heading":"CONTENTS","headingPath":["CONTENTS"],"preview":"","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0003"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0004","chunkIndex":3,"heading":"CONTENTS","headingPath":["CONTENTS"],"preview":"2 Purpose and Scope This document provides preliminary information regarding the register map and descriptions for the Motion Processing Units™ MPU 6000™ and MPU 6050™, collectively called the MPU 60X0™ or MPU™. The MPU devices provide the","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0004"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0005","chunkIndex":4,"heading":"2 Purpose and Scope","headingPath":["2 Purpose and Scope"],"preview":"For precision tracking of both fast and slow motions, the MPU 60X0 features a user programmable gyroscope full scale range of ±250, ±500, ±1000, and ±2000°/sec (dps). The parts also have a userprogrammable accelerometer full scale range of","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0005"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0006","chunkIndex":5,"heading":"3 Register Map","headingPath":["3 Register Map"],"preview":"3 Register Map The register map for the MPU 60X0 is listed below.","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0006"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0007","chunkIndex":6,"heading":"3 Register Map","headingPath":["3 Register Map"],"preview":"","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0007"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0008","chunkIndex":7,"heading":"3 Register Map","headingPath":["3 Register Map"],"preview":"Note: Register Names ending in \\ H and \\ L contain the high and low bytes, respectively, of an internal register value. In the detailed register tables that follow, register names are in capital letters, while register values are in capital","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0008"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0009","chunkIndex":8,"heading":"4 Register Descriptions","headingPath":["4 Register Descriptions"],"preview":"4 Register Descriptions This section describes the function and contents of each register within the MPU 60X0. Note: The device will come up in sleep mode upon power up. 4.1 Registers 13 to 16 – Self Test Registers SELF\\ TEST\\ X, SELF\\ TEST","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0009"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0010","chunkIndex":9,"heading":"Description:","headingPath":["Description:"],"preview":"Description: These registers are used for gyroscope and accelerometer self tests that permit the user to test the mechanical and electrical portions of the gyroscope and the accelerometer. The following sections describe the self test proce","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0010"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0011","chunkIndex":10,"heading":"1. Gyroscope Hardware Self-Test: Relative Method","headingPath":["1. Gyroscope Hardware Self-Test: Relative Method"],"preview":"This self test response is used to determine whether the part has passed or failed self test by finding the change from factory trim of the self test response as follows: $$ \\text { Change from Factory Trim of the Self Test Response } (\\%)","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0011"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0012","chunkIndex":11,"heading":"Obtaining the Gyroscope Factory Trim (FT) Value","headingPath":["Obtaining the Gyroscope Factory Trim (FT) Value"],"preview":"Obtaining the Gyroscope Factory Trim (FT) Value If InvenSense MotionApps software is not used, the procedure detailed below should be followed to obtain the Factory trim value of the self test response (FT) mentioned above. For the specific","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0012"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0013","chunkIndex":12,"heading":"When performing self test for the gyroscope, the full-scale range should be set to ±250dps.","headingPath":["When performing self test for the gyroscope, the full-scale range should be set to ±250dps."],"preview":"When performing self test for the gyroscope, the full scale range should be set to ±250dps. $$ \\begin{array}{l} \\left\\{ \\begin{array}{l l} \\text {FT [Xg] = 25 131 1.046^{(XG\\ TEST 1)}} & \\text {if XG\\ TEST\\neq 0} \\\\ \\text {FT [Xg] = 0} & \\t","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0013"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0014","chunkIndex":13,"heading":"2. Accelerometer Hardware Self-Test: Relative Method","headingPath":["2. Accelerometer Hardware Self-Test: Relative Method"],"preview":"2. Accelerometer Hardware Self Test: Relative Method Accelerometer self test permits users to test the mechanical and electrical portions of the accelerometer. Code for operating self test is included within the MotionApps software provided","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0014"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0015","chunkIndex":14,"heading":"2. Accelerometer Hardware Self-Test: Relative Method","headingPath":["2. Accelerometer Hardware Self-Test: Relative Method"],"preview":"\\text { Change from Factory Trim of the Self Test Response } (\\%) = \\frac {(S T R F T)}{F T} $$ $$ \\text { where }, $$ $$ F T = \\text { Factory trim value of selftest response, available via MotionApps software } $$ This change from factory","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0015"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0016","chunkIndex":15,"heading":"Obtaining the Accelerometer Factory Trim (FT) Value","headingPath":["Obtaining the Accelerometer Factory Trim (FT) Value"],"preview":"Obtaining the Accelerometer Factory Trim (FT) Value If InvenSense MotionApps software is not used, the procedure detailed below should be followed to obtain the Factory trim value of the self test response (FT) mentioned above. For the spec","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0016"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0017","chunkIndex":16,"heading":"When performing accelerometer self test, the full-scale range should be set to ±8g.","headingPath":["When performing accelerometer self test, the full-scale range should be set to ±8g."],"preview":"When performing accelerometer self test, the full scale range should be set to ±8g. $$ \\left\\{ \\begin{array}{l l} \\mathrm{FT[Xa]} = 4 0 9 6 0. 3 4 \\frac {0 . 9 2 (\\frac {X A { } T E S T 1}{2 ^ {5} 2})}{0 . 3 4} & \\text {if XA\\ TEST} \\neq 0.","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0017"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0018","chunkIndex":17,"heading":"When performing accelerometer self test, the full-scale range should be set to ±8g.","headingPath":["When performing accelerometer self test, the full-scale range should be set to ±8g."],"preview":"","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0018"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0019","chunkIndex":18,"heading":"4.2 Register 25 – Sample Rate Divider","headingPath":["4.2 Register 25 – Sample Rate Divider"],"preview":"4.2 Register 25 – Sample Rate Divider SMPRT\\ DIV Type: Read/Write","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0019"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0020","chunkIndex":19,"heading":"Description:","headingPath":["Description:"],"preview":"Note: The accelerometer output rate is 1kHz. This means that for a Sample Rate greater than 1kHz, the same accelerometer sample may be output to the FIFO, DMP, and sensor registers more than once. For a diagram of the gyroscope and accelero","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0020"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0021","chunkIndex":20,"heading":"4.3 Register 26 – Configuration CONFIG","headingPath":["4.3 Register 26 – Configuration CONFIG"],"preview":"4.3 Register 26 – Configuration CONFIG Type: Read/Write","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0021"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0022","chunkIndex":21,"heading":"Description:","headingPath":["Description:"],"preview":"","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0022"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0023","chunkIndex":22,"heading":"Description:","headingPath":["Description:"],"preview":"","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0023"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0024","chunkIndex":23,"heading":"Parameters:","headingPath":["Parameters:"],"preview":"Parameters: EXT\\ SYNC\\ SET 3 bit unsigned value. Configures the FSYNC pin sampling. DLPF\\ CFG 3 bit unsigned value. Configures the DLPF setting. 4.4 Register 27 – Gyroscope Configuration GYRO\\ CONFIG Type: Read/Write","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0024"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0025","chunkIndex":24,"heading":"Description:","headingPath":["Description:"],"preview":"Description: This register is used to trigger gyroscope self test and configure the gyroscopes’ full scale range. Gyroscope self test permits users to test the mechanical and electrical portions of the gyroscope. The self test for each gyro","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0025"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0026","chunkIndex":25,"heading":"Description:","headingPath":["Description:"],"preview":"The self test limits for each gyroscope axis is provided in the electrical characteristics tables of the MPU 6000/MPU 6050 Product Specification document. When the value of the self test response is within the min/max limits of the product","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0026"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0027","chunkIndex":26,"heading":"Description:","headingPath":["Description:"],"preview":"","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0027"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0028","chunkIndex":27,"heading":"Description:","headingPath":["Description:"],"preview":"Description: This register is used to trigger accelerometer self test and configure the accelerometer full scale range. This register also configures the Digital High Pass Filter (DHPF). Accelerometer self test permits users to test the mec","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0028"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0029","chunkIndex":28,"heading":"Description:","headingPath":["Description:"],"preview":"The self test limits for each accelerometer axis is provided in the electrical characteristics tables of the MPU 6000/MPU 6050 Product Specification document. When the value of the self test response is within the min/max limits of the prod","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0029"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0030","chunkIndex":29,"heading":"4.6 Register 35 – FIFO Enable","headingPath":["4.6 Register 35 – FIFO Enable"],"preview":"4.6 Register 35 – FIFO Enable FIFO\\ EN Type: Read/Write","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0030"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0031","chunkIndex":30,"heading":"Description:","headingPath":["Description:"],"preview":"When an external Slave’s corresponding FIFO\\ EN bit (SLVx\\ FIFO\\ EN, where x=0, 1, or 2) is set to 1, the data stored in its corresponding data registers (EXT\\ SENS\\ DATA registers, Registers 73 to 96) will be written into the FIFO buffer a","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0031"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0032","chunkIndex":31,"heading":"Description:","headingPath":["Description:"],"preview":"","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0032"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0033","chunkIndex":32,"heading":"Description:","headingPath":["Description:"],"preview":"","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0033"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0034","chunkIndex":33,"heading":"4.7 Register $3 6 - 1 ^ { 2 } C$ Master Control I2C\\_MST\\_CTRL","headingPath":["4.7 Register $3 6 - 1 ^ { 2 } C$ Master Control I2C\\_MST\\_CTRL"],"preview":"4.7 Register $3 6 1 ^ { 2 } C$ Master Control I2C\\ MST\\ CTRL Type: Read/Write","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0034"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0035","chunkIndex":34,"heading":"Description:","headingPath":["Description:"],"preview":"In circuits where multi master capability is required, the state of the ${ \\mathsf { I } } ^ { 2 } { \\mathsf { C } }$ bus must always be monitored by each separate ${ \\mathsf { I } } ^ { 2 } { \\mathsf { C } }$ Master. Before an ${ \\mathsf {","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0035"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0036","chunkIndex":35,"heading":"Description:","headingPath":["Description:"],"preview":"When the Slave 3 FIFO enable bit (SLV\\ 3\\ FIFO\\ EN) is set to 1, Slave 3 sensor measurement data will be loaded into the FIFO buffer each time. EXT\\ SENS\\ DATA register association with ${ \\mathsf { I } } ^ { 2 } { \\mathsf { C } }$ Slaves i","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0036"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0037","chunkIndex":36,"heading":"Description:","headingPath":["Description:"],"preview":"","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0037"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0038","chunkIndex":37,"heading":"Description:","headingPath":["Description:"],"preview":"","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0038"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0039","chunkIndex":38,"heading":"4.8 Registers 37 to 39 – I2C Slave 0 Control","headingPath":["4.8 Registers 37 to 39 – I2C Slave 0 Control"],"preview":"4.8 Registers 37 to 39 – I2C Slave 0 Control I2C\\ SLV0\\ ADDR, I2C\\ SLV0\\ REG, and I2C\\ SLV0\\ CTRL Type: Read/Write","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0039"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0040","chunkIndex":39,"heading":"Description:","headingPath":["Description:"],"preview":"Description: These registers configure the data transfer sequence for Slave 0. Slaves 1, 2, and 3 also behave in a similar manner to Slave 0. However, Slave 4’s characteristics differ greatly from those of Slaves 0 3. For further informatio","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0040"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0041","chunkIndex":40,"heading":"Description:","headingPath":["Description:"],"preview":"In read mode, the result of the read is placed in the lowest available EXT\\ SENS\\ DATA register. For further information regarding the allocation of read results, please refer to the EXT\\ SENS\\ DATA register description (Registers 73 – 96).","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0041"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0042","chunkIndex":41,"heading":"Description:","headingPath":["Description:"],"preview":"When I2C\\ SLV0\\ REG\\ DIS is set to 1, the transaction will read or write data only. When cleared to 0, the transaction will write a register address prior to reading or writing data. This bit should equal 0 when specifying the register addr","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0042"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0043","chunkIndex":42,"heading":"Description:","headingPath":["Description:"],"preview":"The processing order for the slaves is fixed. The sequence followed for processing the slaves is Slave 0, Slave 1, Slave 2, Slave 3 and Slave 4. If a particular Slave is disabled it will be skipped. Each slave can either be accessed at the","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0043"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0044","chunkIndex":43,"heading":"Description:","headingPath":["Description:"],"preview":"","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0044"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0045","chunkIndex":44,"heading":"Description:","headingPath":["Description:"],"preview":"Byte Swapping Example The following example demonstrates byte swapping for I2C\\ SLV0\\ BYTE\\ SW = 1, I2C\\ SLV0\\ GRP = 0, I2C\\ SLV0\\ REG = 0x01, and I2C\\ SLV0\\ LEN = 0x4: 1. The first byte, read from Slave 0 register 0x01, will be stored at E","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0045"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0046","chunkIndex":45,"heading":"Slave Access Example","headingPath":["Slave Access Example"],"preview":"Slave Access Example Slave 0 is accessed at the Sample Rate, while Slave 1 is accessed at half the Sample Rate. The other slaves are disabled. In the first cycle, both Slave 0 and Slave 1 will be accessed. However, in the second cycle, only","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0046"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0047","chunkIndex":46,"heading":"4.9 Registers 40 to 42 – I2C Slave 1 Control","headingPath":["4.9 Registers 40 to 42 – I2C Slave 1 Control"],"preview":"4.9 Registers 40 to 42 – I2C Slave 1 Control I2C\\ SLV1\\ ADDR, I2C\\ SLV1\\ REG, and I2C\\ SLV1\\ CTRL Type: Read/Write","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0047"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0048","chunkIndex":47,"heading":"Description:","headingPath":["Description:"],"preview":"Description: These registers describe the data transfer sequence for Slave 1. Their functions correspond to those described for the Slave 0 registers (Registers 37 to 39). 4.10 Registers 43 to 45 – I2C Slave 2 Control I2C\\ SLV2\\ ADDR, I2C\\","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0048"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0049","chunkIndex":48,"heading":"Description:","headingPath":["Description:"],"preview":"Description: These registers describe the data transfer sequence for Slave 2. Their functions correspond to those described for the Slave 0 registers (Registers 37 to 39). 4.11 Registers 46 to 48 – I2C Slave 3 Control I2C\\ SLV3\\ ADDR, I2C\\","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0049"},{"chunkId":"ds_0f73eabcae531d8c17f1-chunk-0050","chunkIndex":49,"heading":"Description:","headingPath":["Description:"],"preview":"Description: These registers describe the data transfer sequence for Slave 3. Their functions correspond to those described for the Slave 0 registers (Registers 37 to 39). 4.12 Registers 49 to 53 – I2C Slave 4 Control I2C\\ SLV4\\ ADDR, I2C\\","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_0f73eabcae531d8c17f1/chunks/ds_0f73eabcae531d8c17f1-chunk-0050"}]}