{"datasheetId":"ds_82796e9d0f47b1a24814","nextCursor":"49","chunks":[{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0001","chunkIndex":0,"heading":"ESP32-WROOM-32","headingPath":["ESP32-WROOM-32"],"preview":"ESP32 WROOM 32 Datasheet Version 3.6","images":[{"path":"images/bc454508889ea3c7b679d24a2fbb68a849b0c5c7de0310bae100c5366762affe.jpg","name":"bc454508889ea3c7b679d24a2fbb68a849b0c5c7de0310bae100c5366762affe.jpg","mimeType":"image/jpeg","semanticKind":"text_snippet","semanticCaption":"Not Recommended for New Designs (NRND) watermark","viewUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/asset?path=images%2Fbc454508889ea3c7b679d24a2fbb68a849b0c5c7de0310bae100c5366762affe.jpg"},{"path":"images/7de79c37072452938c87f7e6137a278354bf283a0615c037952c570aba1f53a6.jpg","name":"7de79c37072452938c87f7e6137a278354bf283a0615c037952c570aba1f53a6.jpg","mimeType":"image/jpeg","semanticKind":"unknown","semanticCaption":"QR code snippet","viewUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/asset?path=images%2F7de79c37072452938c87f7e6137a278354bf283a0615c037952c570aba1f53a6.jpg"}],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0001"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0002","chunkIndex":1,"heading":"1.1 Features","headingPath":["1.1 Features"],"preview":"1.1 Features CPU and On Chip Memory ESP32 D0WDQ6 embedded, Xtensa dual core 32 bit LX6 microprocessor, up to 240 MHz 448 KB ROM 520 KB SRAM 8 KB SRAM in RTC Wi Fi • 802.11b/g/n • Bit rate: 802.11n up to 150 Mbps A MPDU and A MSDU aggregatio","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0002"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0003","chunkIndex":2,"heading":"Peripherals","headingPath":["Peripherals"],"preview":"Peripherals • Up to 32 GPIOs – 5 strapping GPIOs SD card, UART, SPI, SDIO, I2C, LED PWM, Motor PWM, I2S, IR, pulse counter, GPIO, capacitive touch sensor, ADC, DAC, TWAI® (compatible with ISO 11898 1, i.e. CAN Specification 2.0) Integrated","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0003"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0004","chunkIndex":3,"heading":"Certification","headingPath":["Certification"],"preview":"Certification RF certification: See certificates for ESP32 WROOM 32 Green certification: REACH/RoHS Test HTOL/HTSL/uHAST/TCT/ESD 1.2 Ordering Information ESP32 WROOM 32 is a powerful, generic Wi Fi + Bluetooth® + Bluetooth LE MCU module tha","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0004"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0005","chunkIndex":4,"heading":"1.2 Ordering Information","headingPath":["1.2 Ordering Information"],"preview":"At the core of this module is the ESP32 D0WDQ6, an Xtensa® 32 bit LX7 CPU that operates at up to 240 MHz. You can power off the CPU and make use of the low power coprocessor to constantly monitor the peripherals for changes or crossing of t","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0005"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0006","chunkIndex":5,"heading":"1.3 Applications","headingPath":["1.3 Applications"],"preview":"1.3 Applications Smart Home Industrial Automation Health Care Consumer Electronics Smart Agriculture POS Machines Service Robot Audio Devices Generic Low power IoT Sensor Hubs • Generic Low power IoT Data Loggers • Cameras for Video Streami","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0006"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0007","chunkIndex":6,"heading":"2 Pin Definitions 8","headingPath":["2 Pin Definitions 8"],"preview":"2 Pin Definitions 8 2.1 Pin Layout 8 2.2 Pin Description 8 3 Boot Configurations 11 3.1 Chip Boot Mode Control 12 3.2 Internal LDO (VDD\\ SDIO) Voltage Control 13 3.3 U0TXD Printing Control 14 3.4 Timing Control of SDIO Slave 14 3.5 JTAG Sig","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0007"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0008","chunkIndex":7,"heading":"5 Electrical Characteristics 26","headingPath":["5 Electrical Characteristics 26"],"preview":"5 Electrical Characteristics 26 5.1 Absolute Maximum Ratings 26 5.2 Recommended Operating Conditions 26 5.3 DC Characteristics (3.3 V, 25 °C) 26 5.4 Current Consumption Characteristics 27 Not Recommended For New Designs (NRND) 5.5 Memory Sp","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0008"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0009","chunkIndex":8,"heading":"List of Tables","headingPath":["List of Tables"],"preview":"List of Tables 1 ESP32 WROOM 32 Ordering Information 3 2 Pin Definitions 9 3 Default Configuration of Strapping Pins 11 4 Description of Timing Parameters for the Strapping Pins 12 5 Chip Boot Mode Control 12 6 U0TXD Printing Control 14 7 T","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0009"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0010","chunkIndex":9,"heading":"List of Figures","headingPath":["List of Figures"],"preview":"List of Figures 1 ESP32 WROOM 32 Pin Layout (Top View) 8 2 Visualization of Timing Parameters for the Strapping Pins 12 3 Chip Boot Flow 13 4 Visualization of Timing Parameters for Power up and Reset 14 5 ESP32 WROOM 32 Schematics 33 6 ESP3","images":[{"path":"images/39e11a51ddfa19bf3c97c3c2e390d56852da0cd5df3b8a00169b3212a2f25a50.jpg","name":"39e11a51ddfa19bf3c97c3c2e390d56852da0cd5df3b8a00169b3212a2f25a50.jpg","mimeType":"image/jpeg","semanticKind":"pinout","semanticCaption":"Top view pinout diagram of a module with keepout zone","viewUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/asset?path=images%2F39e11a51ddfa19bf3c97c3c2e390d56852da0cd5df3b8a00169b3212a2f25a50.jpg"}],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0010"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0011","chunkIndex":10,"heading":"2.2 Pin Description","headingPath":["2.2 Pin Description"],"preview":"2.2 Pin Description ESP32 WROOM 32 has 38 pins. See pin definitions in Table 2. For peripheral pin configurations, please refer to Section 4.2 Digital Peripherals. Table 2: Pin Definitions 1 P: power supply; I: input; O: output.","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0011"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0012","chunkIndex":11,"heading":"2.2 Pin Description","headingPath":["2.2 Pin Description"],"preview":"2 Pins SCK/CLK, SDO/SD0, SDI/SD1, SHD/SD2, SWP/SD3 and SCS/CMD, namely, GPIO6 to GPIO11 on the ESP32 D0WDQ6 chip are connected to the SPI flash integrated on the module and are not recommended for other uses. 3 Boot Configurations Note: The","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0012"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0013","chunkIndex":12,"heading":"Note:","headingPath":["Note:"],"preview":"The default values of all the above eFuse bits are 0, which means that they are not burnt. Given that eFuse is one time programmable, once an eFuse bit is programmed to 1, it can never be reverted to 0. For how to program eFuse bits, please","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0013"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0014","chunkIndex":13,"heading":"Note:","headingPath":["Note:"],"preview":"All strapping pins have latches. At system reset, the latches sample the bit values of their respective strapping pins and store them until the chip is powered down or shut down. The states of latches cannot be changed in any other way. It","images":[{"path":"images/be852d4cf43cd4dd6f15de4214dd1d24d58f8897a9592a856efa69e31339f471.jpg","name":"be852d4cf43cd4dd6f15de4214dd1d24d58f8897a9592a856efa69e31339f471.jpg","mimeType":"image/jpeg","semanticKind":"timing_diagram","semanticCaption":"Timing diagram for CHIP_PU and strapping pin","viewUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/asset?path=images%2Fbe852d4cf43cd4dd6f15de4214dd1d24d58f8897a9592a856efa69e31339f471.jpg"}],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0014"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0015","chunkIndex":14,"heading":"Note:","headingPath":["Note:"],"preview":"| Timepoint | Voltage Level | | | | | tSU | V IL nRST | | tSU | V IH | | tH | V IH |","images":[{"path":"images/e191f30cb3907198ccdf98f040e2309066db2ec522bd6c67fe377b05052838d1.jpg","name":"e191f30cb3907198ccdf98f040e2309066db2ec522bd6c67fe377b05052838d1.jpg","mimeType":"image/jpeg","semanticKind":"flow_diagram","semanticCaption":"Reset and boot sequence flow diagram","viewUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/asset?path=images%2Fe191f30cb3907198ccdf98f040e2309066db2ec522bd6c67fe377b05052838d1.jpg"}],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0015"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0016","chunkIndex":15,"heading":"3.1 Chip Boot Mode Control","headingPath":["3.1 Chip Boot Mode Control"],"preview":"C |GPIO0 GPIO2 = 00| F[\"Initialization\"] E G[\"Copy the program from flash to RAM\"] F H[\"Waiting for download from UART/SDIO\"] G I[\"Jump to entry point in RAM\"] ```","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0016"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0017","chunkIndex":16,"heading":"3.3 U0TXD Printing Control","headingPath":["3.3 U0TXD Printing Control"],"preview":"3.3 U0TXD Printing Control During booting, the strapping pin MTDO can be used to control the U0TXD Printing, as Table 6 shows. Table 6: U0TXD Printing Control","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0017"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0018","chunkIndex":17,"heading":"3.5 JTAG Signal Source Control","headingPath":["3.5 JTAG Signal Source Control"],"preview":"3.5 JTAG Signal Source Control If EFUSE\\ DISABLE\\ JTAG is set to 1, the source of JTAG signals can be disabled. 3.6 Chip Power up and Reset Once the power is supplied to the chip, its power rails need a short time to stabilize. After that,","images":[{"path":"images/a4fed2f5a419e6ea0b5cf36cc4120395a2d02a6c88e0e68def4870cae462f1f4.jpg","name":"a4fed2f5a419e6ea0b5cf36cc4120395a2d02a6c88e0e68def4870cae462f1f4.jpg","mimeType":"image/jpeg","semanticKind":"timing_diagram","semanticCaption":"Power-up and reset timing diagram","viewUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/asset?path=images%2Fa4fed2f5a419e6ea0b5cf36cc4120395a2d02a6c88e0e68def4870cae462f1f4.jpg"}],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0018"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0019","chunkIndex":18,"heading":"3.6 Chip Power-up and Reset","headingPath":["3.6 Chip Power-up and Reset"],"preview":"","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0019"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0020","chunkIndex":19,"heading":"4 Peripherals","headingPath":["4 Peripherals"],"preview":"4 Peripherals 4.1 Peripheral Overview ESP32 D0WDQ6 chip integrates a rich set of peripherals including SPI, I2S, UART, I2C, pulse count controller, TWAI®, ADC, DAC, touch sensor, etc. To learn more about on chip components, please refer to","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0020"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0021","chunkIndex":20,"heading":"4.2 Digital Peripherals","headingPath":["4.2 Digital Peripherals"],"preview":"4.2 Digital Peripherals 4.2.1 General Purpose Input / Output Interface (GPIO) ESP32 has 34 GPIO pins which can be assigned various functions by programming the appropriate registers. There are several kinds of GPIOs: digital only, analog en","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0021"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0022","chunkIndex":21,"heading":"4.2.1 General Purpose Input / Output Interface (GPIO)","headingPath":["4.2.1 General Purpose Input / Output Interface (GPIO)"],"preview":"For details, see ESP32 Series Datasheet Section Peripheral Pin Configurations, ESP32 Series Datasheet Appendix A – ESP32 Pin Lists and ESP32 Technical Reference Manual Chapter IO\\ MUX and GPIO Matrix. 4.2.2 Serial Peripheral Interface (SPI)","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0022"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0023","chunkIndex":22,"heading":"Features of General Purpose SPI (GP-SPI)","headingPath":["Features of General Purpose SPI (GP-SPI)"],"preview":"Features of General Purpose SPI (GP SPI) Programmable data transfer length, in multiples of 1 byte Four line full duplex/half duplex communication and three line half duplex communication support Master mode and slave mode • Programmable CP","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0023"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0024","chunkIndex":23,"heading":"4.2.3 Universal Asynchronous Receiver Transmitter (UART)","headingPath":["4.2.3 Universal Asynchronous Receiver Transmitter (UART)"],"preview":"4.2.3 Universal Asynchronous Receiver Transmitter (UART) The UART in the ESP32 chip facilitates the transmission and reception of asynchronous serial data between the chip and external UART devices. It consists of two UARTs in the main syst","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0024"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0025","chunkIndex":24,"heading":"Pin Assignment","headingPath":["Pin Assignment"],"preview":"Pin Assignment The pins for UART can be chosen from any GPIOs via the GPIO Matrix. For more information about the pin assignment, see ESP32 Series Datasheet Section Peripheral Pin Configurations and ESP32 Technical Reference Manual Chapter","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0025"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0026","chunkIndex":25,"heading":"Pin Assignment","headingPath":["Pin Assignment"],"preview":"Pin Assignment For regular I2C, the pins used can be chosen from any GPIOs via the GPIO Matrix. For more information about the pin assignment, see ESP32 Series Datasheet Section Peripheral Pin Configurations and ESP32 Technical Reference Ma","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0026"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0027","chunkIndex":26,"heading":"Feature List","headingPath":["Feature List"],"preview":"Feature List Master mode and slave mode • Full duplex and half duplex communications A variety of audio standards supported Configurable high precision output clock Supports PDM signal input and output Configurable data transmit and receive","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0027"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0028","chunkIndex":27,"heading":"4.2.6 Remote Control Peripheral","headingPath":["4.2.6 Remote Control Peripheral"],"preview":"4.2.6 Remote Control Peripheral The Remote Control Peripheral (RMT) controls the transmission and reception of infrared remote control signals. Feature List • Eight channels for sending and receiving infrared remote control signals Independ","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0028"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0029","chunkIndex":28,"heading":"Pin Assignment","headingPath":["Pin Assignment"],"preview":"Pin Assignment The pins for the Remote Control Peripheral can be chosen from any GPIOs via the GPIO Matrix. For more information about the pin assignment, see ESP32 Series Datasheet Section Peripheral Pin Configurations and ESP32 Technical","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0029"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0030","chunkIndex":29,"heading":"Feature List","headingPath":["Feature List"],"preview":"Feature List • Eight independent pulse counter units Each pulse counter unit has a 16 bit signed counter register and two channels Counter modes: increment, decrement, or disable • Glitch filtering for input pulse signals and control signal","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0030"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0031","chunkIndex":30,"heading":"4.2.8 LED PWM Controller","headingPath":["4.2.8 LED PWM Controller"],"preview":"4.2.8 LED PWM Controller The LED PWM Controller (LEDC) is designed to generate PWM signals for LED control. Feature List • Sixteen independent PWM generators Maximum PWM duty cycle resolution of 20 bits • Eight independent timers with 20 bi","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0031"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0032","chunkIndex":31,"heading":"Pin Assignment","headingPath":["Pin Assignment"],"preview":"Pin Assignment The pins for the LED PWM Controller can be chosen from any GPIOs via the GPIO Matrix. For more information about the pin assignment, see ESP32 Series Datasheet Section Peripheral Pin Configurations and ESP32 Technical Referen","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0032"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0033","chunkIndex":32,"heading":"Feature List","headingPath":["Feature List"],"preview":"Feature List • Three PWM timers for precise timing and frequency control – Every PWM timer has a dedicated 8 bit clock prescaler – The 16 bit counter in the PWM timer can work in count up mode, count down mode, or count up down mode – A har","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0033"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0034","chunkIndex":33,"heading":"Feature List","headingPath":["Feature List"],"preview":"– Decoding current or voltage amplitude derived from duty cycle encoded signals of current/voltage sensors – Three individual capture channels, each of which with a 32 bit time stamp register – Selection of edge polarity and prescaling of i","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0034"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0035","chunkIndex":34,"heading":"4.2.10 SD/SDIO/MMC Host Controller","headingPath":["4.2.10 SD/SDIO/MMC Host Controller"],"preview":"4.2.10 SD/SDIO/MMC Host Controller An SD/SDIO/MMC host controller is available on ESP32. Feature List Supports two external cards Supports SD Memory Card standard: version 3.0 and version 3.01) Supports SDIO Version 3.0 • Supports Consumer","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0035"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0036","chunkIndex":35,"heading":"Pin Assignment","headingPath":["Pin Assignment"],"preview":"Pin Assignment The pins for SD/SDIO/MMC Host Controller are multiplexed with GPIO2, GPIO4, GPIO6 \\~ GPIO15 via IO MUX. For more information about the pin assignment, see ESP32 Series Datasheet Section Peripheral Pin Configurations and ESP32","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0036"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0037","chunkIndex":36,"heading":"Feature List","headingPath":["Feature List"],"preview":"Feature List The SDIO/SPI slave controller supports the following features: • SPI, 1 bit SDIO, and 4 bit SDIO transfer modes over the full clock range from 0 to 50 MHz • Configurable sampling and driving clock edge Special registers for dir","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0037"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0038","chunkIndex":37,"heading":"Pin Assignment","headingPath":["Pin Assignment"],"preview":"Pin Assignment The pins for SDIO/SPI Slave Controller are multiplexed with GPIO2, GPIO4, GPIO6 \\~ GPIO15 via IO MUX. For more information about the pin assignment, see ESP32 Series Datasheet Section Peripheral Pin Configurations and ESP32 T","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0038"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0039","chunkIndex":38,"heading":"Feature List","headingPath":["Feature List"],"preview":"Feature List • Compatible with ISO 11898 1 protocol (CAN Specification 2.0) Standard frame format (11 bit ID) and extended frame format (29 bit ID) Bit rates: – From 25 Kbit/s to 1 Mbit/s in chip revision v0.0/v1.0/v1.1 – From 12.5 Kbit/s t","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0039"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0040","chunkIndex":39,"heading":"Pin Assignment","headingPath":["Pin Assignment"],"preview":"Pin Assignment The pins for the Two wire Automotive Interface can be chosen from any GPIOs via the GPIO Matrix. For more information about the pin assignment, see ESP32 Series Datasheet Section Peripheral Pin Configurations and ESP32 Techni","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0040"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0041","chunkIndex":40,"heading":"Feature List","headingPath":["Feature List"],"preview":"Feature List • 10 Mbps and 100 Mbps rates • Dedicated DMA controller allowing high speed transfer between the dedicated SRAM and Ethernet MAC • Tagged MAC frame (VLAN support) Half duplex (CSMA/CD) and full duplex operation MAC control subl","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0041"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0042","chunkIndex":41,"heading":"Pin Assignment","headingPath":["Pin Assignment"],"preview":"Pin Assignment For information about the pin assignment of Ethernet MAC Interface, see ESP32 Series Datasheet Section Peripheral Pin Configurations and ESP32 Technical Reference Manual Chapter IO\\ MUX and GPIO Matrix. 4.3 Analog Peripherals","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0042"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0043","chunkIndex":42,"heading":"4.3.1 Analog-to-Digital Converter (ADC)","headingPath":["4.3.1 Analog-to-Digital Converter (ADC)"],"preview":"","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0043"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0044","chunkIndex":43,"heading":"Notes:","headingPath":["Notes:"],"preview":"Notes: • When atten = 3 and the measurement result is above 3000 (voltage at approx. 2450 mV), the ADC accuracy will be worse than described in the table above. • To get better DNL results, users can take multiple sampling tests with a filt","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0044"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0045","chunkIndex":44,"heading":"Notes:","headingPath":["Notes:"],"preview":"","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0045"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0046","chunkIndex":45,"heading":"Pin Assignment","headingPath":["Pin Assignment"],"preview":"Pin Assignment With appropriate settings, the ADCs can be configured to measure voltage on 18 pins maximum. For detailed information about the pin assignment, see ESP32 Series Datasheet Section Peripheral Pin Configurations and ESP32 Techni","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0046"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0047","chunkIndex":46,"heading":"Pin Assignment","headingPath":["Pin Assignment"],"preview":"Pin Assignment The DAC can be configured by GPIO 25 and GPIO 26. For detailed information about the pin assignment, see ESP32 Series Datasheet Section Peripheral Pin Configurations and ESP32 Technical Reference Manual Chapter IO\\ MUX and GP","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0047"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0048","chunkIndex":47,"heading":"Pin Assignment","headingPath":["Pin Assignment"],"preview":"Pin Assignment The 10 capacitive sensing GPIOs are listed in Table 11. Table 11: Capacitive Sensing GPIOs Available on ESP32","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0048"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0049","chunkIndex":48,"heading":"5 Electrical Characteristics","headingPath":["5 Electrical Characteristics"],"preview":"5 Electrical Characteristics 5.1 Absolute Maximum Ratings Stresses beyond the absolute maximum ratings listed in Table 12 Absolute Maximum Ratings below may cause permanent damage to the device. These are stress ratings only, and do not ref","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0049"},{"chunkId":"ds_82796e9d0f47b1a24814-chunk-0050","chunkIndex":49,"heading":"5.2 Recommended Operating Conditions","headingPath":["5.2 Recommended Operating Conditions"],"preview":"5.2 Recommended Operating Conditions Table 13: Recommended Operating Conditions","images":[],"readUrl":"https://www.embedr.app/api/datasheets/ds_82796e9d0f47b1a24814/chunks/ds_82796e9d0f47b1a24814-chunk-0050"}]}