# LED Chessboard PCB Workspace

This sidecar workspace contains the Zener schematic source for a programmable
8x8 LED chessboard with the controller integrated on the PCB.

## Current hardware plan

- Controller: onboard ESP32-S3-WROOM-1 module with USB-C programming/data,
  boot/reset buttons, USB ESD protection, and local 3.3 V decoupling. This
  replaces the former bare ESP32-S3 QFN, external SPI flash, 40 MHz crystal,
  RF matching network, and chip antenna.
- Lighting: 64x WS2812B 5 V addressable RGB LEDs, chained through a 74AHCT125
  level shifter and 330 ohm series data resistor.
- Sensing: 64x AH1806-W-style SOT-23 digital Hall switches with 10 k pull-ups.
- Sensor readout: 8x SN74HC165DR SOIC-16 parallel-in/serial-out shift registers
  on 3.3 V. These replace the previous TSSOP-16 variant to avoid fine-pitch
  router/DRC issues and improve assembly margin.
- Power: two USB-C receptacles are used intentionally. `J_USB_POWER` is the
  user-facing 5 V LED/system power input. `J_USB` is the USB data/programming
  connector; its VBUS feeds the logic rail only through a TPS2065CDBV current
  limiter and Schottky OR path so LED surge current is kept off the flashing
  host. An onboard AP2112K-3.3 600 mA regulator powers ESP32, Hall sensors, and
  shift-register logic.
- Decoupling: per-LED, per-Hall, per-shift-register 100 nF capacitors plus bulk
  LED and 3.3 V capacitors. The main LED bulk capacitor is now an SMD polarized
  capacitor intended for bottom-side placement instead of a tall radial part.
- ESP32 module sourcing: `esp32-s3-wroom-1` is a published component-library part
  with KiCad symbol, footprint, 3D model, datasheet notes, Zener documentation,
  sourcing data, and validated build status.
- Placement intent: LEDs and Hall sensors on the top playing surface; MCU,
  support passives, shift registers, connectors, and power components on the
  bottom side or board edges.
- Layout status: routed, with native KiCad DRC reporting 0 unconnected items and
  0 errors as of the latest review. Two conservative inner-layer GND copper
  zones (`GND_IN1_SAFE_PLANE` and `GND_IN2_SAFE_PLANE`) are present, with a
  keepout notch around the ESP32-S3-WROOM module/antenna area.

## Source files

- Main board: `boards/led_chessboard/led_chessboard.zen`
- KiCad layout output path: `boards/led_chessboard/layout/`

## Validate

From the project root, use:

```sh
embedr pcb build
embedr pcb layout --check
```

For final fabrication review, also run native KiCad DRC if KiCad is installed:

```sh
/Applications/KiCad/KiCad.app/Contents/MacOS/kicad-cli pcb drc \
  --format json --severity-all --all-track-errors \
  --output /tmp/led_chessboard_drc.json \
  pcb/boards/led_chessboard/layout/layout.kicad_pcb
```

The last native KiCad DRC review found 0 unconnected items and 0 errors. The
remaining issues were warnings only: non-mirrored back-layer text, silkscreen
overlap/over-copper, and footprint-library mismatch warnings.

## Fabrication notes

- Review Gerbers visually before ordering.
- This is a 4-layer board using `F.Cu`, `In1.Cu`, `In2.Cu`, and `B.Cu`.
- Inner GND zones were added after routing; the pre-zone layout backup is saved
  at `boards/led_chessboard/layout/layout.pre-copper-zone-backup.kicad_pcb`.
- Keep the ESP32 antenna keepout clear in the enclosure/mechanical stack.
- For high LED brightness, use a USB-C 5 V source/cable capable of the expected
  current and enforce a firmware brightness/current limit.

## Open assumptions before PCB release

- Confirm the exact Hall switch MPN, sensitivity, and package orientation.
  AH1806-W is omnipolar, so either magnet pole can actuate it, but magnet
  strength/distance and package orientation still need physical validation.
- Confirm the desired square pitch and mechanical stack-up/diffuser thickness.
  The current generated outline is 216 mm x 216 mm with a 24 mm grid pitch.
- Size the 5 V supply and copper distribution for the firmware brightness limit.
- Keep the ESP32-S3-WROOM-1 PCB antenna end clear of copper, components, and the
  LED/sensor grid per Espressif module layout guidance.
- Silkscreen/text warnings are still present and may affect board appearance,
  but they are not routing/connectivity blockers.
