ESP32-WROOM-32

Datasheet Version 3.6

1 Module Overview

Note:

Check the link or the QR code to make sure that you use the latest version of this document:

https://espressif.com/documentation/esp32-wroom-32\_datasheet\_en.pdf

1.1 Features

CPU and On-Chip Memory

ESP32-D0WDQ6 embedded, Xtensa dual-core 32-bit LX6 microprocessor, up to 240 MHz
448 KB ROM
520 KB SRAM
8 KB SRAM in RTC

Wi-Fi

• 802.11b/g/n
• Bit rate: 802.11n up to 150 Mbps
A-MPDU and A-MSDU aggregation
• 0.4 µs guard interval support
• Center frequency range of operating channel: 2412 ~ 2484 MHz

Bluetooth®

Bluetooth V4.2 BR/EDR and Bluetooth LE specification
Class-1, class-2 and class-3 transmitter
AFH
CVSD and SBC

Peripherals

• Up to 32 GPIOs

– 5 strapping GPIOs

SD card, UART, SPI, SDIO, I2C, LED PWM, Motor PWM, I2S, IR, pulse counter, GPIO, capacitive touch sensor, ADC, DAC, TWAI® (compatible with ISO 11898-1, i.e. CAN Specification 2.0)

Integrated Components on Module

40 MHz crystal oscillator
4 MB SPI flash

Antenna Options

On-board PCB antenna

Operating Conditions

Operating voltage/Power supply: 3.0 ~ 3.6 V
• Operating ambient temperature: –40 ~ 85 °C

Certification

RF certification: See certificates for ESP32-WROOM-32
Green certification: REACH/RoHS

Test

HTOL/HTSL/uHAST/TCT/ESD

1.2 Ordering Information

ESP32-WROOM-32 is a powerful, generic Wi-Fi + Bluetooth® + Bluetooth LE MCU module that targets a wide variety of applications, ranging from low-power sensor networks to the most demanding tasks, such as voice encoding, music streaming and MP3 decoding.

ESP32-WROOM-32 comes with a PCB antenna. The module features a 4 MB external SPI flash.

The ordering information for the modules is as follows:

Table 1: ESP32-WROOM-32 Ordering Information

1 Ambient temperature specifies the recommended temperature range of the environment immediately outside the Espressif module.

2 For details, refer to Section 9 Module Dimensions.

3 For specifications, refer to Section 5.5 Memory Specifications.

At the core of this module is the ESP32-D0WDQ6, an Xtensa® 32-bit LX7 CPU that operates at up to 240 MHz. You can power off the CPU and make use of the low-power coprocessor to constantly monitor the peripherals for changes or crossing of thresholds.

Note:

• For details on the part numbers of the ESP32 family of chips, please refer to the document ESP32 Datasheet.
For chip revision identification, ESP-IDF release that supports a specific chip revision, and other information on chip revisions, please refer to ESP32 Series SoC Errata > Section Chip Revision Identification.

1.3 Applications

Smart Home
Industrial Automation
Health Care
Consumer Electronics
Smart Agriculture
POS Machines
Service Robot

Audio Devices
Generic Low-power IoT Sensor Hubs
• Generic Low-power IoT Data Loggers
• Cameras for Video Streaming
• Speech Recognition
• Image Recognition
SDIO Wi-Fi + Bluetooth Networking Card

Contents

1 Module Overview 2

1.1 Features 2
1.2 Ordering Information 2
1.3 Applications 3

2 Pin Definitions 8

2.1 Pin Layout 8
2.2 Pin Description 8

3 Boot Configurations 11

3.1 Chip Boot Mode Control 12
3.2 Internal LDO (VDD_SDIO) Voltage Control 13
3.3 U0TXD Printing Control 14
3.4 Timing Control of SDIO Slave 14
3.5 JTAG Signal Source Control 14
3.6 Chip Power-up and Reset 14

4 Peripherals 16

4.1 Peripheral Overview 16
4.2 Digital Peripherals 16

4.2.1 General Purpose Input / Output Interface (GPIO) 16
4.2.2 Serial Peripheral Interface (SPI) 16
4.2.3 Universal Asynchronous Receiver Transmitter (UART) 17
4.2.4 I2C Interface 17
4.2.5 I2S Interface 18
4.2.6 Remote Control Peripheral 18
4.2.7 Pulse Counter Controller (PCNT) 19
4.2.8 LED PWM Controller 19
4.2.9 Motor Control PWM 20
4.2.10 SD/SDIO/MMC Host Controller 21
4.2.11 SDIO/SPI Slave Controller 21
4.2.12 TWAI® Controller 22
4.2.13 Ethernet MAC Interface 23

4.3 Analog Peripherals 23

4.3.1 Analog-to-Digital Converter (ADC) 23
4.3.2 Digital-to-Analog Converter (DAC) 24
4.3.3 Touch Sensor 25

5 Electrical Characteristics 26

5.1 Absolute Maximum Ratings 26
5.2 Recommended Operating Conditions 26
5.3 DC Characteristics (3.3 V, 25 °C) 26
5.4 Current Consumption Characteristics 27

Not Recommended For New Designs (NRND)

5.5 Memory Specifications 27

6 RF Characteristics 28

6.1 Wi-Fi Radio 28

6.1.1 Wi-Fi RF Transmitter (TX) Characteristics 28

6.1.2 Wi-Fi RF Receiver (RX) Characteristics 29

6.2 Bluetooth LE Radio 30

6.2.1 Receiver 30

6.2.2 Transmitter 31

7 Module Schematics 33

8 Peripheral Schematics 34

9 Module Dimensions 35

10 PCB Layout Recommendations 36

10.1 PCB Land Pattern 36

10.2 Module Placement for PCB Design 37

11 Product Handling 38

11.1 Storage Conditions 38

11.2 Electrostatic Discharge (ESD) 38

11.3 Reflow Profile 38

11.4 Ultrasonic Vibration 39

Datasheet Versioning 40

Related Documentation and Resources 41

Revision History 42

List of Tables

1 ESP32-WROOM-32 Ordering Information 3
2 Pin Definitions 9
3 Default Configuration of Strapping Pins 11
4 Description of Timing Parameters for the Strapping Pins 12
5 Chip Boot Mode Control 12
6 U0TXD Printing Control 14
7 Timing Control of SDIO Slave 14
8 Description of Timing Parameters for Power-up and Reset 15
9 ADC Characteristics 24
10 ADC Calibration Results 24
11 Capacitive-Sensing GPIOs Available on ESP32 25
12 Absolute Maximum Ratings 26
13 Recommended Operating Conditions 26
14 DC Characteristics (3.3 V, 25 °C) 26
15 Flash Specifications 27
16 Wi-Fi RF Characteristics 28
17 TX Power with Spectral Mask and EVM Meeting 802.11 Standards 28
18 TX EVM Test1 28
19 RX Sensitivity 29
20 Maximum RX Level 30
21 RX Adjacent Channel Rejection 30
22 Receiver Characteristics – Bluetooth LE 30
23 Transmitter Characteristics – Bluetooth LE 31

List of Figures

1 ESP32-WROOM-32 Pin Layout (Top View) 8
2 Visualization of Timing Parameters for the Strapping Pins 12
3 Chip Boot Flow 13
4 Visualization of Timing Parameters for Power-up and Reset 14
5 ESP32-WROOM-32 Schematics 33
6 ESP32-WROOM-32 Peripheral Schematics 34
Physical Dimensions 35
8 Recommended PCB Land Pattern 36
9 Reflow Profile 38

2 Pin Definitions

2.1 Pin Layout

The pin diagram below shows the approximate location of pins on the module. For the actual diagram drawn to scale, please refer to Figure 9 Module Dimensions.

Figure 1: ESP32-WROOM-32 Pin Layout (Top View)

2.2 Pin Description

ESP32-WROOM-32 has 38 pins. See pin definitions in Table 2.

For peripheral pin configurations, please refer to Section 4.2 Digital Peripherals.

Table 2: Pin Definitions
1 P: power supply; I: input; O: output.

2 Pins SCK/CLK, SDO/SD0, SDI/SD1, SHD/SD2, SWP/SD3 and SCS/CMD, namely, GPIO6 to GPIO11 on the ESP32- D0WDQ6 chip are connected to the SPI flash integrated on the module and are not recommended for other uses.

3 Boot Configurations

Note:

The content below is excerpted from ESP32 Series Datasheet > Section Boot Configurations. For the strapping pin mapping between the chip and modules, please refer to Chapter 7 Module Schematics.

The chip allows for configuring the following boot parameters through strapping pins and eFuse bits at power-up or a hardware reset, without microcontroller interaction.

• Chip boot mode

– Strapping pin: GPIO0 and GPIO2

• Internal LDO (VDD_SDIO) Voltage

– Strapping pin: MTDI

– eFuse bit: EFUSE_SDIO_FORCE and EFUSE_SDIO_TIEH

• U0TXD printing

– Strapping pin: MTDO

• Timing of SDIO Slave

– Strapping pin: MTDO and GPIO5

• JTAG signal source

– eFuse bit: EFUSE_DISABLE_JTAG

The default values of all the above eFuse bits are 0, which means that they are not burnt. Given that eFuse is one-time programmable, once an eFuse bit is programmed to 1, it can never be reverted to 0. For how to program eFuse bits, please refer to ESP32 Technical Reference Manual > Chapter eFuse Controller.

The default values of the strapping pins, namely the logic levels, are determined by pins’ internal weak pull-up/pull-down resistors at reset if the pins are not connected to any circuit, or connected to an external high-impedance circuit.

Table 3: Default Configuration of Strapping Pins

To change the bit values, the strapping pins should be connected to external pull-down/pull-up resistances. If the ESP32 is used as a device by a host MCU, the strapping pin voltage levels can also be controlled by the host MCU.

All strapping pins have latches. At system reset, the latches sample the bit values of their respective strapping pins and store them until the chip is powered down or shut down. The states of latches cannot be changed in any other way. It makes the strapping pin values available during the entire chip operation, and the pins are freed up to be used as regular IO pins after reset.

The timing of signals connected to the strapping pins should adhere to the setup time and hold time specifications in Table 4 and Figure 2.

Table 4: Description of Timing Parameters for the Strapping Pins

Figure 2: Visualization of Timing Parameters for the Strapping Pins

3.1 Chip Boot Mode Control

GPIO0 and GPIO2 control the boot mode after the reset is released. See Table 5 Chip Boot Mode Control.

Table 5: Chip Boot Mode Control

1 Bold marks the default value and configuration.
2 Joint Download Boot mode supports the following download methods:
SDIO Download Boot
UART Download Boot

In Joint Download Boot mode, the detailed boot flow of the chip is put below 3.

graph TD
    A["Reset"] --> B{reset cause?}
    B -->|Normal reset| C{Check Strapping Value}
    B -->|Deep-sleep reset| D["Jump to RTC memory address"]
    C -->|GPIO0 GPIO2 = 1x| E["Initialization"]
    C -->|GPIO0 GPIO2 = 00| F["Initialization"]
    E --> G["Copy the program from flash to RAM"]
    F --> H["Waiting for download from UART/SDIO"]
    G --> I["Jump to entry point in RAM"]

Figure 3: Chip Boot Flow

uart_download_dis controls boot mode behaviors:

It permanently disables Download Boot mode when uart_download_dis is set to 1 (valid only for ESP32 chip revisions v3.0 and higher).

3.2 Internal LDO (VDD_SDIO) Voltage Control

MTDI is used to select the VDD_SDIO power supply voltage at reset:

MTDI = 0 (by default), VDD_SDIO pin is powered directly from VDD3P3_RTC. Typically this voltage is 3.3 V. For more information, see ESP32 Series Datasheet > Section Power Scheme.
MTDI = 1, VDD_SDIO pin is powered from internal 1.8 V LDO.

This functionality can be overridden by setting EFUSE_SDIO_FORCE to 1, in which case the EFUSE_SDIO_TIEH determines the VDD_SDIO voltage:

EFUSE_SDIO_TIEH = 0, VDD_SDIO connects to 1.8 V LDO.
EFUSE_SPI_TIEH = 1, VDD_SDIO connects to VDD3P3_RTC.

3.3 U0TXD Printing Control

During booting, the strapping pin MTDO can be used to control the U0TXD Printing, as Table 6 shows.

Table 6: U0TXD Printing Control

1 Bold marks the default value and configuration.

3.4 Timing Control of SDIO Slave

The strapping pin MTDO and GPIO5 can be used to control the timing of SDIO slave, see Table 7 Timing Control of SDIO Slave.

Table 7: Timing Control of SDIO Slave

1 Bold marks the default value and configuration.

3.5 JTAG Signal Source Control

If EFUSE_DISABLE_JTAG is set to 1, the source of JTAG signals can be disabled.

3.6 Chip Power-up and Reset

Once the power is supplied to the chip, its power rails need a short time to stabilize. After that, CHIP_PU – the pin used for power-up and reset – is pulled high to activate the chip. For information on CHIP_PU as well as power-up and reset timing, see Figure 4 and Table 8.

Figure 4: Visualization of Timing Parameters for Power-up and Reset

Table 8: Description of Timing Parameters for Power-up and Reset

For details, please refer to ESP32 Series Datasheet > Section Chip Power-up and Reset.

4 Peripherals

4.1 Peripheral Overview

ESP32-D0WDQ6 chip integrates a rich set of peripherals including SPI, I2S, UART, I2C, pulse count controller, TWAI®, ADC, DAC, touch sensor, etc.

To learn more about on-chip components, please refer to ESP32 Series Datasheet > Section Functional Description.

Note:

The content below is sourced from ESP32 Series Datasheet > Section Functional Description. Some information may not be applicable to ESP32-WROOM-32 as not all the IO signals are exposed on the module.
• To learn more about peripheral signals, please refer to ESP32 Technical Reference Manual > Section Peripheral Signal List.

4.2 Digital Peripherals

4.2.1 General Purpose Input / Output Interface (GPIO)

ESP32 has 34 GPIO pins which can be assigned various functions by programming the appropriate registers. There are several kinds of GPIOs: digital-only, analog-enabled, capacitive-touch-enabled, etc. Analog-enabled GPIOs and Capacitive-touch-enabled GPIOs can be configured as digital GPIOs.

Most of the digital GPIOs can be configured as internal pull-up or pull-down, or set to high impedance. When configured as an input, the input value can be read through the register. The input can also be set to edge-trigger or level-trigger to generate CPU interrupts. Most of the digital IO pins are bi-directional, non-inverting and tristate, including input and output buffers with tristate control. These pins can be multiplexed with other functions, such as the SDIO, UART, SPI, etc. (More details can be found in ESP32 Series Datasheet > Appendix, Table IO_MUX. ) For low-power operations, the GPIOs can be set to hold their states.

For details, see ESP32 Series Datasheet > Section Peripheral Pin Configurations, ESP32 Series Datasheet > Appendix A – ESP32 Pin Lists and ESP32 Technical Reference Manual > Chapter IO_MUX and GPIO Matrix.

4.2.2 Serial Peripheral Interface (SPI)

ESP32 integrates four SPI controllers which can be used to communicate with external devices that use the SPI protocol. Controller SPI0 is used as a buffer for accessing external memory. Controller SPI1 can be used as a master. Controllers SPI2 and SPI3 can be configured as either a master or a slave.

SPI1, SPI2, and SPI3 use signal buses prefixed with SPI, HSPI, and VSPI, respectively.

Features of General Purpose SPI (GP-SPI)

Programmable data transfer length, in multiples of 1 byte
Four-line full-duplex/half-duplex communication and three-line half-duplex communication support

Master mode and slave mode
• Programmable CPOL and CPHA
• Programmable clock

For details, see ESP32 Technical Reference Manual > Chapter SPI Controller.

Pin Assignment

For SPI, the pins are multiplexed with GPIO6 ~ GPIO11 via the IO MUX. For HSPI, the pins are multiplexed with GPIO2, GPIO4, GPIO12 ~ GPIO15 via the IO MUX. For VSPI, the pins are multiplexed with GPIO5, GPIO18 ~ GPIO19, GPIO21 ~ GPIO23 via the IO MUX.

For more information about the pin assignment, see ESP32 Series Datasheet > Section Peripheral Pin Configurations and ESP32 Technical Reference Manual > Chapter IO_MUX and GPIO Matrix.

4.2.3 Universal Asynchronous Receiver Transmitter (UART)

The UART in the ESP32 chip facilitates the transmission and reception of asynchronous serial data between the chip and external UART devices. It consists of two UARTs in the main system, and one low-power LP UART.

Feature List

Programmable baud rate
RAM shared by TX FIFOs and RX FIFOs
• Supports input baud rate self-check
Support for various lengths of data bits and stop bits
Parity bit support
• Asynchronous communication (RS232 and RS485) and IrDA support
• Supports DMA to communicate data in high speed
• Supports UART wake-up
Supports both software and hardware flow control

For details, see ESP32 Technical Reference Manual > Chapter UART Controller.

Pin Assignment

The pins for UART can be chosen from any GPIOs via the GPIO Matrix.

For more information about the pin assignment, see ESP32 Series Datasheet > Section Peripheral Pin Configurations and ESP32 Technical Reference Manual > Chapter IO_MUX and GPIO Matrix.

4.2.4 I2C Interface

ESP32 has two I2C bus interfaces which can serve as I2C master or slave, depending on the user’s configuration.

Feature List

• Two I2C controllers: one in the main system and one in the low-power system
Standard mode (100 Kbit/s)
• Fast mode (400 Kbit/s)
• Up to 5 MHz, yet constrained by SDA pull-up strength
Support for 7-bit and 10-bit addressing, as well as dual address mode
• Supports continuous data transmission with disabled Serial Clock Line (SCL)
• Supports programmable digital noise filter

Users can program command registers to control I2C interfaces, so that they have more flexibility.

For details, see ESP32 Technical Reference Manual > Chapter I2C Controller.

Pin Assignment

For regular I2C, the pins used can be chosen from any GPIOs via the GPIO Matrix.

For more information about the pin assignment, see ESP32 Series Datasheet > Section Peripheral Pin Configurations and ESP32 Technical Reference Manual > Chapter IO_MUX and GPIO Matrix.

4.2.5 I2S Interface

The I2S Controller in the ESP32 chip provides a flexible communication interface for streaming digital data in multimedia applications, particularly digital audio applications.

Feature List

Master mode and slave mode
• Full-duplex and half-duplex communications
A variety of audio standards supported
Configurable high-precision output clock
Supports PDM signal input and output
Configurable data transmit and receive modes

For details, see ESP32 Technical Reference Manual > Chapter I2S Controller.

Pin Assignment

The pins for the I2S Controller can be chosen from any GPIOs via the GPIO Matrix.

For more information about the pin assignment, see ESP32 Series Datasheet > Section Peripheral Pin Configurations and ESP32 Technical Reference Manual > Chapter IO_MUX and GPIO Matrix.

4.2.6 Remote Control Peripheral

The Remote Control Peripheral (RMT) controls the transmission and reception of infrared remote control signals.

Feature List

• Eight channels for sending and receiving infrared remote control signals
Independent transmission and reception capabilities for each channel
Clock divider counter, state machine, and receiver for each RX channel
Supports various infrared protocols

For details, see ESP32 Technical Reference Manual > Chapter Remote Control Peripheral.

Pin Assignment

The pins for the Remote Control Peripheral can be chosen from any GPIOs via the GPIO Matrix.

For more information about the pin assignment, see ESP32 Series Datasheet > Section Peripheral Pin Configurations and ESP32 Technical Reference Manual > Chapter IO_MUX and GPIO Matrix.

4.2.7 Pulse Counter Controller (PCNT)

The pulse counter controller (PCNT) is designed to count input pulses by tracking rising and falling edges of the input pulse signal.

Feature List

• Eight independent pulse counter units
Each pulse counter unit has a 16-bit signed counter register and two channels
Counter modes: increment, decrement, or disable
• Glitch filtering for input pulse signals and control signals
• Selection between counting on rising or falling edges of the input pulse signal

For details, see ESP32 Technical Reference Manual > Chapter Pulse Count Controller.

Pin Assignment

The pins for the Pulse Count Controller can be chosen from any GPIOs via the GPIO Matrix.

For more information about the pin assignment, see ESP32 Series Datasheet > Section Peripheral Pin Configurations and ESP32 Technical Reference Manual > Chapter IO_MUX and GPIO Matrix.

4.2.8 LED PWM Controller

The LED PWM Controller (LEDC) is designed to generate PWM signals for LED control.

Feature List

• Sixteen independent PWM generators
Maximum PWM duty cycle resolution of 20 bits
• Eight independent timers with 20-bit counters, configurable fractional clock dividers and counter overflow values

• Adjustable phase of PWM signal output
• PWM duty cycle dithering
• Automatic duty cycle fading

For details, see ESP32 Technical Reference Manual > Chapter LED PWM Controller.

Pin Assignment

The pins for the LED PWM Controller can be chosen from any GPIOs via the GPIO Matrix.

For more information about the pin assignment, see ESP32 Series Datasheet > Section Peripheral Pin Configurations and ESP32 Technical Reference Manual > Chapter IO_MUX and GPIO Matrix.

4.2.9 Motor Control PWM

The Pulse Width Modulation (PWM) controller can be used for driving digital motors and smart lights. The controller consists of PWM timers, the PWM operator and a dedicated capture sub-module. Each timer provides timing in synchronous or independent form, and each PWM operator generates a waveform for one PWM channel. The dedicated capture sub-module can accurately capture events with external timing.

Feature List

• Three PWM timers for precise timing and frequency control
– Every PWM timer has a dedicated 8-bit clock prescaler
– The 16-bit counter in the PWM timer can work in count-up mode, count-down mode, or count-up-down mode
– A hardware sync can trigger a reload on the PWM timer with a phase register. It will also trigger the prescaler’ restart, so that the timer’s clock can also be synced, with selectable hardware synchronization source

• Three PWM operators for generating waveform pairs

– Six PWM outputs to operate in several topologies
– Configurable dead time on rising and falling edges; each set up independently
– Modulating of PWM output by high-frequency carrier signals, useful when gate drivers are insulated with a transformer

Fault Detection module

– Programmable fault handling in both cycle-by-cycle mode and one-shot mode
– A fault condition can force the PWM output to either high or low logic levels

• Capture module for hardware-based signal processing

– Speed measurement of rotating machinery
– Measurement of elapsed time between position sensor pulses
– Period and duty cycle measurement of pulse train signals

– Decoding current or voltage amplitude derived from duty-cycle-encoded signals of current/voltage sensors
– Three individual capture channels, each of which with a 32-bit time-stamp register
– Selection of edge polarity and prescaling of input capture signals
– The capture timer can sync with a PWM timer or external signals

For details, see ESP32 Technical Reference Manual > Chapter Motor Control PWM.

Pin Assignment

The pins for the Motor Control PWM can be chosen from any GPIOs via the GPIO Matrix.

For more information about the pin assignment, see ESP32 Series Datasheet > Section Peripheral Pin Configurations and ESP32 Technical Reference Manual > Chapter IO_MUX and GPIO Matrix.

4.2.10 SD/SDIO/MMC Host Controller

An SD/SDIO/MMC host controller is available on ESP32.

Feature List

Supports two external cards
Supports SD Memory Card standard: version 3.0 and version 3.01)
Supports SDIO Version 3.0
• Supports Consumer Electronics Advanced Transport Architecture (CE-ATA Version 1.1)
• Supports Multimedia Cards (MMC version 4.41, eMMC version 4.5 and version 4.51)

The controller allows up to 80 MHz clock output in three different data-bus modes: 1-bit, 4-bit, and 8-bit modes. It supports two SD/SDIO/MMC4.41 cards in a 4-bit data-bus mode. It also supports one SD card operating at 1.8 V.

For details, see ESP32 Technical Reference Manual > Chapter SD/MMC Host Controller.

Pin Assignment

The pins for SD/SDIO/MMC Host Controller are multiplexed with GPIO2, GPIO4, GPIO6 ~ GPIO15 via IO MUX.

For more information about the pin assignment, see ESP32 Series Datasheet > Section Peripheral Pin Configurations and ESP32 Technical Reference Manual > Chapter IO_MUX and GPIO Matrix.

4.2.11 SDIO/SPI Slave Controller

ESP32 integrates an SD device interface that conforms to the industry-standard SDIO Card Specification Version 2.0, and allows a host controller to access the SoC, using the SDIO bus interface and protocol. ESP32 acts as the slave on the SDIO bus. The host can access the SDIO-interface registers directly and can access shared memory via a DMA engine, thus maximizing performance without engaging the processor cores.

Feature List

The SDIO/SPI slave controller supports the following features:

• SPI, 1-bit SDIO, and 4-bit SDIO transfer modes over the full clock range from 0 to 50 MHz
• Configurable sampling and driving clock edge
Special registers for direct access by host
Interrupts to host for initiating data transfer
• Automatic loading of SDIO bus data and automatic discarding of padding data
• Block size of up to 512 bytes
• Interrupt vectors between the host and the slave, allowing both to interrupt each other
Supports DMA for data transfer

For details, see ESP32 Technical Reference Manual > Chapter SDIO Slave Controller.

Pin Assignment

The pins for SDIO/SPI Slave Controller are multiplexed with GPIO2, GPIO4, GPIO6 ~ GPIO15 via IO MUX.

For more information about the pin assignment, see ESP32 Series Datasheet > Section Peripheral Pin Configurations and ESP32 Technical Reference Manual > Chapter IO_MUX and GPIO Matrix.

4.2.12 TWAI® Controller

The Two-wire Automotive Interface (TWAI®) is a multi-master, multi-cast communication protocol designed for automotive applications. The TWAI controller facilitates the communication based on this protocol.

Feature List

• Compatible with ISO 11898-1 protocol (CAN Specification 2.0)
Standard frame format (11-bit ID) and extended frame format (29-bit ID)
Bit rates:

– From 25 Kbit/s to 1 Mbit/s in chip revision v0.0/v1.0/v1.1
– From 12.5 Kbit/s to 1 Mbit/s in chip revision v3.0/v3.1

Multiple modes of operation: Normal, Listen Only, and Self-Test

64-byte receive FIFO

Special transmissions: single-shot transmissions and self reception

Acceptance filter (single and dual filter modes)

• Error detection and handling: error counters, configurable error interrupt threshold, error code capture, arbitration lost capture

For details, see ESP32 Technical Reference Manual > Chapter Two-wire Automotive Interface (TWAI).

Pin Assignment

The pins for the Two-wire Automotive Interface can be chosen from any GPIOs via the GPIO Matrix.

For more information about the pin assignment, see ESP32 Series Datasheet > Section Peripheral Pin Configurations and ESP32 Technical Reference Manual > Chapter IO_MUX and GPIO Matrix.

4.2.13 Ethernet MAC Interface

An IEEE-802.3-2008-compliant Media Access Controller (MAC) is provided for Ethernet LAN communications. ESP32 requires an external physical interface device (PHY) to connect to the physical LAN bus (twisted-pair, fiber, etc.). The PHY is connected to ESP32 through 17 signals of MII or nine signals of RMII.

Feature List

• 10 Mbps and 100 Mbps rates
• Dedicated DMA controller allowing high-speed transfer between the dedicated SRAM and Ethernet MAC
• Tagged MAC frame (VLAN support)
Half-duplex (CSMA/CD) and full-duplex operation
MAC control sublayer (control frames)
32-bit CRC generation and removal
Several address-filtering modes for physical and multicast address (multicast and group addresses)
32-bit status code for each transmitted or received frame
Internal FIFOs to buffer transmit and receive frames. The transmit FIFO and the receive FIFO are both 512 words (32-bit)
Hardware PTP (Precision Time Protocol) in accordance with IEEE 1588 2008 (PTP V2)
25 MHz/50 MHz clock output

For details, see ESP32 Technical Reference Manual > Chapter Ethernet Media Access Controller (MAC).

Pin Assignment

For information about the pin assignment of Ethernet MAC Interface, see ESP32 Series Datasheet > Section Peripheral Pin Configurations and ESP32 Technical Reference Manual > Chapter IO_MUX and GPIO Matrix.

4.3 Analog Peripherals

4.3.1 Analog-to-Digital Converter (ADC)

ESP32 integrates two 12-bit SAR ADCs and supports measurements on 18 channels (analog-enabled pins). The ULP coprocessor in ESP32 is also designed to measure voltage, while operating in the sleep mode, which enables low-power consumption. The CPU can be woken up by a threshold setting and/or via other triggers.

Table 9 describes the ADC characteristics.
Table 9: ADC Characteristics

Notes:

• When atten = 3 and the measurement result is above 3000 (voltage at approx. 2450 mV), the ADC accuracy will be worse than described in the table above.
• To get better DNL results, users can take multiple sampling tests with a filter, or calculate the average value.
The input voltage range of GPIO pins within VDD3P3_RTC domain should strictly follow the DC characteristics provided in Table 14. Otherwise, measurement errors may be introduced, and chip performance may be affected.

By default, there are ±6% differences in measured results between chips. ESP-IDF provides couple of calibration methods for ADC1. Results after calibration using eFuse Vref value are shown in Table 10. For higher accuracy, users may apply other calibration methods provided in ESP-IDF, or implement their own.

Table 10: ADC Calibration Results

For details, see ESP32 Technical Reference Manual > Chapter On-Chip Sensors and Analog Signal Processing.

Pin Assignment

With appropriate settings, the ADCs can be configured to measure voltage on 18 pins maximum. For detailed information about the pin assignment, see ESP32 Series Datasheet > Section Peripheral Pin Configurations and ESP32 Technical Reference Manual > Chapter IO_MUX and GPIO Matrix.

4.3.2 Digital-to-Analog Converter (DAC)

Two 8-bit DAC channels can be used to convert two digital signals into two analog voltage signal outputs. The design structure is composed of integrated resistor strings and a buffer. This dual DAC supports power supply as input voltage reference. The two DAC channels can also support independent conversions.

For details, see ESP32 Technical Reference Manual > Chapter On-Chip Sensors and Analog Signal Processing.

Pin Assignment

The DAC can be configured by GPIO 25 and GPIO 26. For detailed information about the pin assignment, see ESP32 Series Datasheet > Section Peripheral Pin Configurations and ESP32 Technical Reference Manual > Chapter IO_MUX and GPIO Matrix.

4.3.3 Touch Sensor

ESP32 has 10 capacitive-sensing GPIOs, which detect variations induced by touching or approaching the GPIOs with a finger or other objects. The low-noise nature of the design and the high sensitivity of the circuit allow relatively small pads to be used. Arrays of pads can also be used, so that a larger area or more points can be detected.

Pin Assignment

The 10 capacitive-sensing GPIOs are listed in Table 11.

Table 11: Capacitive-Sensing GPIOs Available on ESP32

For details, see ESP32 Technical Reference Manual > Chapter On-Chip Sensors and Analog Signal Processing.

Note: ESP32 Touch Sensor has not passed the Conducted Susceptibility (CS) test for now, and thus has limited application scenarios.

5 Electrical Characteristics

5.1 Absolute Maximum Ratings

Stresses beyond the absolute maximum ratings listed in Table 12 Absolute Maximum Ratings below may cause permanent damage to the device. These are stress ratings only, and do not refer to the functional operation of the device that should follow the Table 13 Recommended Operating Conditions.

Table 12: Absolute Maximum Ratings

1. The module worked properly after a 24-hour test in ambient temperature at 25 °C, and the IOs in three domains (VDD3P3_RTC, VDD3P3_CPU, VDD_SDIO) output high logic level to ground. Please note that pins occupied by flash and/or PSRAM in the VDD_SDIO power domain were excluded from the test.
2. Please see Appendix IO_MUX of ESP32 Datasheet for IO’s power domain.

5.2 Recommended Operating Conditions

Table 13: Recommended Operating Conditions

5.3 DC Characteristics (3.3 V, 25 °C)

Table 14: DC Characteristics (3.3 V, 25 °C)

Notes:

1. Please see Appendix IO_MUX of ESP32 Datasheet for IO’s power domain. VDD is the I/O voltage for a particular power domain of pins.
2. For VDD3P3_CPU and VDD3P3_RTC power domain, per-pin current sourced in the same domain is gradually reduced from around 40 mA to around 29 mA, VOH>=2.64 V, as the number of current-source pins increases.
3. Pins occupied by flash and/or PSRAM in the VDD_SDIO power domain were excluded from the test.

5.4 Current Consumption Characteristics

Owing to the use of advanced power-management technologies, the module can switch between different power modes. For details on different power modes, please refer to Section RTC and Low-Power Management in ESP32 Series Datasheet.

5.5 Memory Specifications

The data below is sourced from the memory vendor datasheet. These values are guaranteed through design and/or characterization but are not fully tested in production. Devices are shipped with the memory erased.

Table 15: Flash Specifications

6 RF Characteristics

This section contains tables with RF characteristics of the Espressif product.

The RF data is measured at the antenna port, where RF cable is connected, including the front-end loss.

Devices should operate in the center frequency range allocated by regional regulatory authorities. The target center frequency range and the target transmit power are configurable by software. See ESP RF Test Tool and Test Guide for instructions.

Unless otherwise stated, the RF tests are conducted with a 3.3 V (±5%) supply at $2 5 ^ { \circ } \mathrm { C }$ ambient temperature.

6.1 Wi-Fi Radio

Table 16: Wi-Fi RF Characteristics

6.1.1 Wi-Fi RF Transmitter (TX) Characteristics

Table 17: TX Power with Spectral Mask and EVM Meeting 802.11 Standards

Table 18: TX EVM Test1

Cont’d on next page

Table 18 – cont’d from previous page

1 EVM is measured at the corresponding typical TX power provided in Table 17 Wi-Fi RF Transmitter (TX) Characteristics above.

6.1.2 Wi-Fi RF Receiver (RX) Characteristics

For RX tests, the PER (packet error rate) limit is 8% for 802.11b, and 10% for 802.11g/n.

Table 19: RX Sensitivity

Table 20: Maximum RX Level

Table 21: RX Adjacent Channel Rejection

6.2 Bluetooth LE Radio

6.2.1 Receiver

Table 22: Receiver Characteristics – Bluetooth LE

6.2.2 Transmitter

Table 23: Transmitter Characteristics – Bluetooth LE

Th is is th e refe re n ce d esi g n of th e m od u l e .

M odu le Schematics

Figu re 5: ESP32-WROO M -32 Schematics

8 Peripheral Schematics

This is the typical application circuit of the module connected with peripheral components (for example, power supply, antenna, reset button, JTAG interface, and UART interface).

Figure 6: ESP32-WROOM-32 Peripheral Schematics

Soldering Pad 39 to the ground of the base board is not a must. If you choose to solder it, please apply Espressifthe correct amount of soldering paste. Too much soldering paste may increase the gap between the Title Appmodule and the baseboard. As a result, the adhesion between other pins and the baseboard may be poor.
Date: Wed To ensure the power supply to the ESP32 chip during power-up, it is advised to add an RC delay circuit at the EN pin. The recommended setting for the RC delay circuit is usually R = 10 kΩ and C = 1 µF. However, specific parameters should be adjusted based on the power-up timing of the module and the power-up and reset sequence timing of the chip. For ESP32’s power-up and reset sequence timing diagram, please refer to Section 3.6 Chip Power-up and Reset.
• UART0 is used to download firmware and log output. When using the AT firmware, note that the UART GPIO is already configured. It is recommended to use the default configuration. Please refer to ESP-AT User Guide for ESP32 > Section Hardware Connection.

9 Module Dimensions

Top View

Side View

Unit: mm

Bottom View
Figure 7: Physical Dimensions

Note:

For information about tape, reel, and product marking, please refer to ESP32 Module Packaging Information.

10 PCB Layout Recommendations

10.1 PCB Land Pattern

This section provides the following resources for your reference:

• Figures for recommended PCB land patterns with all the dimensions needed for PCB design. See Figure 10.1 PCB Land Pattern.
Source files of recommended PCB land patterns to measure dimensions not covered in Figure 10.1. You can view the source files for ESP32-WROOM-32 with Autodesk Viewer.

Figure 8: Recommended PCB Land Pattern

10.2 Module Placement for PCB Design

If module-on-board design is adopted, attention should be paid while positioning the module on the base board. The interference of the base board on the module’s antenna performance should be minimized.

For details about module placement for PCB design, please refer to ESP32 Hardware Design Guidelines > Section General Principles of PCB Layout for Modules.

11 Product Handling

11.1 Storage Conditions

The products sealed in moisture barrier bags (MBB) should be stored in a non-condensing atmospheric environment of $< 4 0 ~ ^ { \circ } \mathrm { C }$ and 90%RH. The module is rated at the moisture sensitivity level (MSL) of 3.

After unpacking, the module must be soldered within 168 hours with the factory conditions $2 5 \pm 5 ^ { \circ } \mathrm { C }$ and 60 %RH. If the above conditions are not met, the module needs to be baked.

11.2 Electrostatic Discharge (ESD)

Human body model (HBM): ±2000 V
• Charged-device model (CDM): ±500 V

11.3 Reflow Profile

Solder the module in a single reflow.

Figure 9: Reflow Profile

11.4 Ultrasonic Vibration

Avoid exposing Espressif modules to vibration from ultrasonic equipment, such as ultrasonic welders or ultrasonic cleaners. This vibration may induce resonance in the in-module crystal and lead to its malfunction or even failure. As a consequence, the module may stop working or its performance may deteriorate.

Datasheet Versioning

1 Watermark will be added to the datasheet title page only when all the product variants covered by this datasheet are not recommended for new designs.
2 Watermark will be added to the datasheet title page only when all the product variants covered by this datasheet have reached end of life.

Related Documentation and Resources

Related Documentation

ESP32 Series Datasheet – Specifications of the ESP32 hardware.
ESP32 ECO and Workarounds for Bugs – Correction of ESP32 design errors.
ESP32 Series SoC Errata – Descriptions of known errors in ESP32 series of SoCs.
Certificates https://espressif.com/en/support/documents/certificates

ESP32 Technical Reference Manual – Detailed information on how to use the ESP32 memory and peripherals.

• ESP32 Hardware Design Guidelines – Guidelines on how to integrate the ESP32 into your hardware product.

• ESP32 Product/Process Change Notifications (PCN) https://espressif.com/en/support/documents/pcns

• ESP32 Advisories – Information on security, bugs, compatibility, component reliability. https://espressif.com/en/support/documents/advisories

Documentation Updates and Update Notification Subscription https://espressif.com/en/support/download/documents

Developer Zone

ESP-IDF Programming Guide for ESP32 – Extensive documentation for the ESP-IDF development framework.
ESP-IDF and other development frameworks on GitHub. https://github.com/espressif
• ESP32 BBS Forum – Engineer-to-Engineer (E2E) Community for Espressif products where you can post questions, share knowledge, explore ideas, and help solve problems with fellow engineers. https://esp32.com/
ESP-FAQ – A summary document of frequently asked questions released by Espressif. https://espressif.com/projects/esp-faq/en/latest/index.html
The ESP Journal – Best Practices, Articles, and Notes from Espressif folks. https://blog.espressif.com/
See the tabs SDKs and Demos, Apps, Tools, AT Firmware. https://espressif.com/en/support/download/sdks-demos

Products

ESP32 Series SoCs – Browse through all ESP32 SoCs. https://espressif.com/en/products/socs?id=ESP32
ESP32 Series Modules – Browse through all ESP32-based modules. https://espressif.com/en/products/modules?id=ESP32
ESP32 Series DevKits – Browse through all ESP32-based devkits. https://espressif.com/en/products/devkits?id=ESP32
• ESP Product Selector – Find an Espressif hardware product suitable for your needs by comparing or applying filters. https://products.espressif.com/#/product-selector?language=en

Contact Us

See the tabs Sales Questions, Technical Enquiries, Circuit Schematic & PCB Design Review, Get Samples (Online stores), Become Our Supplier, Comments & Suggestions. https://espressif.com/en/contact-us/sales-questions

Revision History

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